This invention relates to a semiconductor device and a manufacturing method therefore.
In the circuit of a semiconductor device including a MOS transistor, as shown in FIG. 1, a resistor R103 having a relatively large resistance value is used as a circuit for protection of an input to the gate 101a of a MOS transistor Q101. This resistor R103 is formed at the layer having the same level as that of the gate 101a electrode. Namely, a gate oxide film and a field oxide film are formed on the surface of a semiconductor substrate. A polysilicon film is further deposited thereon. At the polysilicon film thus formed, the above-described resistor R103 and gate 101a are formed. In recent years, there are many instances where, in compliance with the high speed requirement of the circuit operating speed, there is employed a polycide structure comprising a refractory metal or disilicide of a refractory metal silicide such as molybdenum silicide (MoSi.sub.2) or tungsten silicide (WSi.sub.2), etc. deposited by sputtering on the surface of the polysilicon film, thus to form wiring in the polycide film.
However, when such a structure is employed, the layer where resistor R103 is to be formed is also of the polycide structure. As a result, the resistance value is reduced to about one tenth because of the presence of the disilicide film. In order to increase the resistance value in view of the above, the length of the resistor must be increased. However, since the length of the resistor must be increased ten times if an attempt is made to obtain the same resistance value as that in the prior art, such an implementation is practically impossible, thus failing to provide a sufficient protection function.
The high resistance requirement also exists in the semiconductor device including an enhancement type static RAM (E/R type SRAM). In the E/R type SRAM constructed as a flip-flop using MOS FETQ121 and Q122 as shown in FIG. 2, it is required that resistors R123, R124 connected to the drains of the transistors Q121, Q122 have high resistance values, respectively. To form these resistors R123, R124, there is employed a method comprising the steps of depositing an interlayer insulating film and a polysilicon film in the recited order on the surface of the semiconductor substrate, and patterning the polysilicon film by photolithographic or photoetching to form wiring. The method further includes the steps of leaving the resist film only in the area where resistor R123 or R124 is to be formed, and ion-implanting, e.g., arsenic (As) as an impurity using this resist film as an ion implantation mask, thus allowing the region corresponding to the portion except for the resistance region of the polysilicon film to have a low resistance. Resistors R123, R124 are formed with the polysilicon in the undoped resistance region as a high resistance region. However, the drawbacks with this method are as follows.
At an step of ion-implanting the impurity such as arsenic, etc., heat treatment is conducted in order to activate this impurity. Since the impurity is diffused into the high resistance region by about 0.5 to 1.0 .mu.m, it is difficult to form a fine high resistance region with good controllability. Particularly, when the length of the high resistance region is below 3 .mu.m as shown in FIG. 11, the impurity is diffused, so both ends thereof are in a short-circuit state. As a result, the resistance value is lowered, failing to perform the role of the resistance element.
As stated above, the problem with conventional semiconductor devices including MOS transistors is that, in forming a resistance element for the protection of an input in the same layer as that forming the gate electrode, a resistance element having a sufficient resistance value cannot be practically formed when the resistance element is constructed as the polycide structure, thereby failing to perform the role of the protective circuit. A further problem with conventional semiconductor devices including E/R type SRAM is that it is difficult to form a fine region having a high resistance value with good controllability in forming the resistor connected to the drain in the same layer as that forming the wiring portion.